700 Design Engineer Mid jobs in Los Angeles,CA

4+ years of professional experience in costume, fashion, apparel, or consumer product design and development.
Solid understanding of hardlines and softlines categories, including raw materials, plastic, textiles, print, pattern, graphic composition, and manufacturing processes.
Expertise in product prototyping and a strong grasp of the manufacturing process, including sculpting, tooling, paint master techniques, materials, and mechanisms.
Strong product design skills, encompassing 3D product design, technical design, sketching, creative application and manipulation of art, final mechanical art, and fabric/trim identification.
Proven ability to manage multiple design projects simultaneously and meet deadlines.
Proficiency in computer software such as MS Office, PowerPoint, Photoshop, and Illustrator.
Bachelor's Degree in a related field (e.g., Fashion design, Costume Design, Toy Design, Industrial Design) or equivalent professional experience.

Elect Design and Analy Engr

INNOVA

Huntington Park, CA 90255

A Bachelor of Science degree in Engineering (specializing in Electrical, Mechanical, or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry, or equivalent non-US qualifications relevant to the job description
Proven experience in ASIC/FPGA verification processes
Familiarity with defining the architectural framework for ASIC/FPGA verification using SystemVerilog/UVM, including the delivery and release of production designs
Proficiency in hardware verification languages, particularly SystemVerilog and SystemVerilog Assertions
Demonstrated experience in implementing test plans effectively
Solid understanding of Object-Oriented Programming principles, such as Inheritance and Polymorphism
Capability to design self-checking and reusable testbenches from the ground up
Experience in developing Functional Coverage Models and achieving Code Coverage closure
Capable of collaborating with design and system engineering to establish accurate and verifiable ASIC/FPGA level specifications
Familiarity with waveform debug tools
This position is on a W-2 basis