1279 Informatica Developer jobs in Union City,CA

PG&E Corporation

Oakland, CA 94612

Bachelor's Degree in Data Science, Machine Learning, Computer Science, Physics, Econometrics or Economics, Engineering, Mathematics, Applied Sciences, Statistics, or equivalent field
Experience in Data Science, 6 years or no experience, if possess Doctoral Degree or higher in Data Science, Machine Learning, Computer Science, Physics, Econometrics or Economics, Engineering, Mathematics, Applied Sciences, Statistics, or equivalent field

Intuit

Mountain View, CA 94043

7-10 years of relevant experience in delivering significant strategic and operational impact across an organization
Ownership mindset with an ability to convert strategic plans into actions, drive projects to completion, and sweat the details to deliver the outcome
Experienced change management leader who is able to influence and build trust across a highly cross-functional organization (peers, executives and working teams) to accelerate outcomes
Excellent communicator with strong presentation skills and compelling storytelling abilities; feel very comfortable leading and facilitating workshops and monthly/quarterly business reviews with executives and teams
Highly self-motivated, thrives in ambiguity and able to manage multiple projects with little day to day direction
Well-rounded interpersonal skills with the capacity to build relationships with senior stakeholders and collaborate across with team members across varying levels
Ability to generate innovative insights, ideas, and opportunities that drive tangible business outcomes
FinTech and/or SaaS experience a plus, but not required

EITAcies

Santa Clara, CA 95054

Vertex Sigma Software

Foster City, CA 94404

E-SPACE

Saratoga, CA 95070

PG&E Corporation Careers

Oakland, CA 94601

Samsung Electronics Co.

San Jose, CA 95123

10+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master's degree, or 6+ years of experience with a PhD
Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
Demonstrated successful architectural through RTL design experience on high performance digital designs
Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Knowledge of system caches and directory snoop filter protocols.
Familiarity with different on-chip network topologies: mesh, ring, crossbar.
Experience in leading and mentoring a team of engineers.
Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
Knowledge of memory subsystem design including coherent cache design.