543 Mechanical Engineering Intern Design jobs in Troy,NY

Lead Research Engineer - FPGA Design

GE Vernova

Niskayuna, NY 12309

OnsiteUrgently HiringEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

Ph.D. in Computer Science, Electrical Engineering, or related disciplines
Master's degree in Computer Science, Electrical Engineering, or related disciplines with a minimum of 2 years of industry experience
Bachelor's degree in Computer Science, Electrical Engineering, or related disciplines with a minimum of 5 years of industry experience
2-5 years of strong FPGA and SoC design experience using Verilog, SystemVerilog and VHDL
2-5 years of hands-on experience with Xilinx and/or Intel (Altera) FPGA devices, tools, and ecosystems (e.g., ModelSim, Intel Quartus, Xilinx Vivado)
2-5 years of solid understanding of digital logic design, including FSMs, pipelining, and resource optimization.
2-5 years of experience with RTL simulation, synthesis, place-and-route, and timing closure
2-5 years of knowledge of clock domain crossing (CDC) techniques and metastability mitigation
2-5 years of familiarity with high-speed and standard interfaces (UART, SPI, I²C, Ethernet, PCIe, DDR)
2-5 years of experience developing testbenches and performing functional verification.
2-5 years of proficiency with on-chip debugging tools (e.g., ILA, SignalTap)
2-5 years of ability to read and interpret schematics, timing diagrams, and hardware datasheets
2-5 years of experience using version control systems (Git preferred)
2-5 years of experience with high-level synthesis (HLS) tools and algorithm-to-hardware workflows, including Vitis HLS and integration with MathWorks MATLAB/Simulink for model-based design and verification.
Legal authorization to work in the US is required. We will not sponsor individuals at the Bachelor's level for employment visas, now or in the future, for this job opening.
Must be willing to work out of an office located in Niskayuna, NY
This role requires access to U.S. export-controlled information. If applicable, final offers will be contingent on ability to obtain authorization for access to U.S. export-controlled information from the U.S. Government.
Any offer of employment is conditioned upon the successful completion of a drug screen (as applicable).

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Project Civil Engineer

C.T. MALE ASSOCIATES

Latham, NY 12110

$80,000-$105,000/yr

~ 11 min OnsiteUrgently Hiring

Bachelor's degree (B.S.) in Civil or Environmental Engineering from ABET-accredited four-year college or university
Eight (8+) plus years of progressive related technical experience and/or training
New York State Professional Engineer (P.E.)
Knowledge of land-use processes and regulations
Proficiency with Microsoft Office
Valid driver's license
Ability to perform limited travel to project sites and C.T. Male offices in upstate New York

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New, Posted 11 hours ago

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Lead Engineer - Design

GE Vernova

Niskayuna, NY 12309

OnsiteUrgently HiringEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

Ph.D. in Computer Science, Electrical Engineering, or related disciplines
Master's degree in Computer Science, Electrical Engineering, or related disciplines with a minimum of 2 years of industry experience
Bachelor's degree in Computer Science, Electrical Engineering, or related disciplines with a minimum of 5 years of industry experience
2-5 years of strong FPGA and SoC design experience using Verilog, SystemVerilog and VHDL
2-5 years of hands-on experience with Xilinx and/or Intel (Altera) FPGA devices, tools, and ecosystems (e.g., ModelSim, Intel Quartus, Xilinx Vivado)
2-5 years of solid understanding of digital logic design, including FSMs, pipelining, and resource optimization.
2-5 years of experience with RTL simulation, synthesis, place-and-route, and timing closure
2-5 years of knowledge of clock domain crossing (CDC) techniques and metastability mitigation
2-5 years of familiarity with high-speed and standard interfaces (UART, SPI, I²C, Ethernet, PCIe, DDR)
2-5 years of experience developing testbenches and performing functional verification.
2-5 years of proficiency with on-chip debugging tools (e.g., ILA, SignalTap)
2-5 years of ability to read and interpret schematics, timing diagrams, and hardware datasheets
2-5 years of experience using version control systems (Git preferred)
2-5 years of experience with high-level synthesis (HLS) tools and algorithm-to-hardware workflows, including Vitis HLS and integration with MathWorks MATLAB/Simulink for model-based design and verification.
GE Vernova will only employ those who are legally authorized to work in the United States for this opening.
Legal authorization to work in the US is required.
We will not sponsor individuals at the Bachelor's level for employment visas, now or in the future, for this job opening.
This role requires access to U.S. export-controlled information. If applicable, final offers will be contingent on ability to obtain authorization for access to U.S. export-controlled information from the U.S. Government.
Must be willing to work out of an office located in Niskayuna, NY

SmartExplore AI is experimental.

New, Posted 10 hours ago

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DoD Skillbridge Intern

Gilbane Building Company

Albany, NY 12211

New, Posted 10 hours ago

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Fleet Mechanic

Dollar General

Amsterdam, NY 12010

~ 45 min Onsite

This job is located in Amsterdam NY
Perform comprehensive diagnostics to identify mechanical issues.
Execute repairs and maintenance on engines, hydraulic systems, brake systems, and more.
Accurately document work performed and parts used.
Stay updated with advancements in automotive technology and tools.
Are you fascinated by the workings of vehicles and take pride in ensuring they perform at their best? If you possess a keen mechanical aptitude and a penchant for problem-solving, this role could be perfect for you.

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