978 Assistant Controller Remote jobs in Saratoga,CA

Completed an accredited FNP or PA program with a national certification
In the past 5 years, practiced as an Advanced Practitioner for at least: 2 years in an outpatient primary care setting seeing patients of all ages (0+), OR 1 year in an outpatient primary care setting seeing patients of all ages (0+), coupled with either a 1 year primary care fellowship or 1+ year in an urgent care setting seeing patients of all ages (0+)
State licensed in California, obtained by your One Medical start date

Hope Services

San Jose, CA 95123

Hope Services

San Jose, CA 95129

99 Ranch Market

San Jose, CA 95123

Bilingual: fluent in English plus Chinese (Mandarin or Cantonese) or Spanish
Associate degree or equivalent hands-on work experience
1–2 years of relevant work experience
Willingness to relocate and travel between locations within a ~50-mile radius during training
Able to work flexible schedules, including nights, weekends, and holidays
Proficient in Microsoft Office
Authorized to work in the United States

Inspire Healthcare

Aptos, CA 95003

Samsung Electronics Co.

San Jose, CA 95123

10+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master's degree, or 6+ years of experience with a PhD
Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
Demonstrated successful architectural through RTL design experience on high performance digital designs
Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Knowledge of system caches and directory snoop filter protocols.
Familiarity with different on-chip network topologies: mesh, ring, crossbar.
Experience in leading and mentoring a team of engineers.
Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
Knowledge of memory subsystem design including coherent cache design.