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Analog Design

Santa Clara,CA

406 Analog Design jobs in Santa Clara,CA

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Staff Analog Circuit Designer

Broadcom

San Jose, CA 95123

~ 16 min OnsiteHealth InsurancePaid Time OffRetirement Benefit

  • Staff Analog Circuit Designer
  • Transistor-level design and layout of high-performance, low-power analog and digital circuits.
  • Bachelor Degree plus 8+ years of related industry experience
  • Master Degree plus 6+ years of related industry experience
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Physical Design Engineer II (eInfochips Inc)

Arrow Electronics

San Jose, CA 95110

Urgently Hiring
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Data Center Lab Designer / Architect

Advanced Micro Devices

San Jose, CA 95124

Hybrid~ 16 min

  • Data Center Lab Designer / Architect
  • Lead technical evaluation, lab design strategy, infrastructure standards, and construction oversight for high-density data center environments
  • Site readiness, infrastructure scalability, and deployment execution align with AMD's performance, efficiency, and 3-5 year product roadmap requirements
  • Sets global lab design direction across business units and use cases
  • Deep expertise in large-scale data center infrastructure
  • Strong design leadership and project execution skills
  • Devise strategies for complex, high-density compute environments
  • Align cross-functional teams to deliver against active project milestones
  • Establish global design standards across labs and business units
  • Strong analytical thinking, executive communication, and stakeholder alignment skills
  • Plan infrastructure evolution aligned to future product roadmaps
  • Identify risk early and drive mitigation through structured governance
  • Data Center Due Diligence & Strategic Assessment
  • Perform technical due diligence on new and existing facilities
  • Evaluate power availability, redundancy, cooling capacity, environmental risk, connectivity, and expansion potential
  • Review infrastructure drawings, layouts, and single-line diagrams
  • Assess design maturity (Concept through IFC) and contractor capability
  • Identify technical, schedule, and scalability risks with structured reporting
  • Validate infrastructure alignment with high-density and future roadmap requirements
  • Lab Design & Global Standards Leadership
  • Develop scalable, modular lab designs optimized for density, airflow, accessibility, and operational efficiency
  • Set direction and define global lab design standards across AMD BUs and use cases
  • Ensure compliance with industry standards and evolving best practices
  • Integrate energy-efficient and sustainable design principles into all deployments
  • Utilize advanced modeling and simulation tools for airflow and thermal validation where required
  • Infrastructure Strategy & Technology Integration
  • Define corporate standards for power distribution, cooling systems, IT networking space, and rack density
  • Assess and implement high-density and liquid cooling readiness
  • Support integration of renewable energy strategies and advanced cooling technologies
  • Lead implementation and governance of DCIM, monitoring, and automation platforms
  • Ensure modular and POD-based expansion strategies support long-term scalability
  • Construction Monitoring & Deployment Governance
  • Monitor construction progress, quality, and contractor performance
  • Evaluate supply chain readiness for critical long-lead infrastructure components
  • Track execution against schedule and budget constraints
  • Lead design reviews and ensure alignment between intent and build
  • Oversee commissioning and validate operational readiness prior to deployment
  • Stakeholder & Program Management
  • Lead cross-functional collaboration across IT, Facilities, Real Estate, Procurement, and Product SMEs
  • Manage multiple concurrent projects while maintaining delivery timelines
  • Liaise with vendors and contractors to ensure installation timelines and standards adherence
  • Provide executive-level reporting on risk, budget, and schedule health
  • Maintain detailed documentation of specifications, assessments, and progress tracking
  • Preferred Experience
  • Semiconductor or high-density data center design, construction, or operations
  • Proven experience in large-scale lab or data center architecture and build-outs
  • Strong background in infrastructure assessment and technical due diligence
  • Experience reviewing construction drawings and overseeing commissioning
  • Familiarity with high-density computing, cloud-scale environments, and high-performance networks
  • Experience with airflow modeling or thermal simulation tools
  • Knowledge of DCIM and infrastructure monitoring systems
  • Relevant data center certifications (DCCA, CDCDP, or similar) preferred
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Mechanical Design Engineer / Principal Mechanical Design Engineer

Northrop Grumman

Sunnyvale, CA 94087

~ 14 min OnsiteHealth InsurancePaid Time Off

  • Bachelor of Science degree in a STEM (Science, Technology, Engineering, Mathematics) discipline with 2 years relevant experience;
  • Masters of Science degree in a STEM discipline with no relevant experience.
  • US Citizenship with the ability to obtain and maintain a DoD Secret level security clearance.
  • Computer skills including developing designs using solid modeling software, such as CREO/NX is required.
  • A fluent knowledge of ANSI Y14.5 drawing standards and geometric tolerance is required.
  • Must be fluent in mechanical engineering principles, and must be proficient in developing design concepts, performing trades-studies, and conducting supporting evaluations and analyses.
  • Bachelors of Science degree in a STEM (Science, Technology, Engineering, Mathematics) discipline with 5 years relevant experience;
  • Masters of Science degree in a STEM discipline with 3 years relevant experience,
  • PhD in STEM discipline with 1 years relevant experience.
  • A working knowledge of ANSI Y14.5 drawing standards and geometric tolerance is also necessary.
  • Production issues resolution experience.
  • Ability to work onsite full-time
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Micro-architect/Logic Designer, Coherent Interconnect

Samsung Electronics Co.

San Jose, CA 95123

~ 16 min OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

  • 10+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master's degree, or 6+ years of experience with a PhD
  • Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
  • Demonstrated successful architectural through RTL design experience on high performance digital designs
  • Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
  • Knowledge of system caches and directory snoop filter protocols.
  • Familiarity with different on-chip network topologies: mesh, ring, crossbar.
  • Experience in leading and mentoring a team of engineers.
  • Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
  • Knowledge of memory subsystem design including coherent cache design.
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Electrical Engineer, Principal

PG&E Corporation

Newark, CA 94560

Remote

  • Bachelors Degree in Engineering-Electrical or equivalent experience
  • 13 or more years of experience in electrical utility engineering with an emphasis in design, construction, maintenance and operation of substations and equipment within the substations
  • Travel 20-30% of the time
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Principal Electrical Engineer - Test

Raytheon

San Jose, CA 95123

Flexible Schedule
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Residential Youth Caregiver - Relocation to Hershey, PA Required

Milton Hershey School

Half Moon Bay, CA 94019

Urgently Hiring
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Manufacturing Engineer

Keysight Technologies

Santa Clara, CA 95051

OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

  • Bachelor's or Master's degree in Mechanical Engineering, Physics, Optical Sciences, or a closely related technical discipline.
  • 4-7 years of experience working in technical manufacturing environment.
  • Strong communicator who collaborates effectively across functions and supports technical discussions with data and analysis.
  • Demonstrated ability to think critically and work independently to develop ideas and translate new concepts into practical, results-driven solutions.
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Senior Software Engineer - Data Protection Software Engineering (C, C++)

Dell

Santa Clara, CA 95050

Onsite

  • Senior Software Engineer
  • Data Protection Software Engineering
  • C
  • C++
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