522 Designer 3 Engineering jobs in San Jose,CA

Recommended

Apply Directly

Engineering Manager level 3

Northrop Grumman

Sunnyvale, CA 94087

Requires TravelHealth InsurancePaid Time Off

Bachelor's Degree in STEM (Science, Technology, Engineering or Math discipline) with 8 years of engineering experience; OR a Master's Degree in STEM (Science, Technology, Engineering or Math discipline) with 6 years of engineering experience.
3 years of professional experience in the defense or aerospace industries.
2 years demonstrated success managing technical teams.
2 years of experience working in a technical role.
Strong engineering background with demonstrated experience managing through design and production.
Solid understanding of engineering process with execution experience.
Experience managing large control accounts with accountability for scope, schedule, budget, and technical performance
The ability to obtain and maintain a U.S. Government Secret clearance is required.
Must be a U.S. Citizen
U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

SmartExplore AI is experimental.

New, Posted 1 day ago

Recommended

Apply Directly

Senior Software Engineer - Data Protection Software Engineering (C, C++)

Dell

Santa Clara, CA 95050

~ 14 min Onsite

Senior Software Engineer
Data Protection Software Engineering
C, C++
Deep expertise in distributed systems
Control path and data path development for scalable and performance critical solutions

SmartExplore AI is experimental.

Recommended

Apply Directly

Electrical Design Engineer Level 3 /4

Northrop Grumman

Sunnyvale, CA 94087

~ 19 min OnsiteHealth InsurancePaid Time Off

Bachelor's Degree in Electrical Engineering or a related field with 5 years of related experience
Master's Degree in Electrical Engineering or a related field with 3 years of related experience
Bachelor's Degree in Electrical Engineering or a related field with 8 years of related experience
Master's Degree in Electrical Engineering or a related field with 6 years of related experience
Experience with design of analog and digital circuits
Experience with data acquisition systems
Experience in cable design and manufacturing
Experience with standard electrical lab equipment - Oscilloscope, DMM, IR tester (or similar)
Demonstrated troubleshooting experience with electromechanical control systems and circuits
Experience designing and troubleshooting custom test setups.
The ability to work autonomously and be a self-starter are requirements for this position.
US Citizenship required.
Ability to obtain and maintain a Secret Clearance
CLEARANCE TYPE: Secret
U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

SmartExplore AI is experimental.

New, Posted 1 day ago

Recommended

Apply Directly

RTL Design Engineer for AI Evaluation

SaidGig

San Jose, CA

Recommended

Apply Directly

Manufacturing Engineer

Keysight Technologies

Santa Clara, CA 95051

~ 14 min OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

Bachelor's or Master's degree in Mechanical Engineering, Physics, Optical Sciences, or a closely related technical discipline.
4-7 years of experience working in technical manufacturing environment.
Strong communicator who collaborates effectively across functions and supports technical discussions with data and analysis.
Demonstrated ability to think critically and work independently to develop ideas and translate new concepts into practical, results-driven solutions.

SmartExplore AI is experimental.

Recommended

Apply Directly

Micro-architect/Logic Designer, Coherent Interconnect

Samsung Electronics Co.

San Jose, CA 95123

OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

10+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master's degree, or 6+ years of experience with a PhD
Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
Demonstrated successful architectural through RTL design experience on high performance digital designs
Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Knowledge of system caches and directory snoop filter protocols.
Familiarity with different on-chip network topologies: mesh, ring, crossbar.
Experience in leading and mentoring a team of engineers.
Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
Knowledge of memory subsystem design including coherent cache design.

SmartExplore AI is experimental.

Recommended

ResumeLibrary