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Designer 3 Engineering

San Jose,CA

507 Designer 3 Engineering jobs in San Jose,CA

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Arrow Electronics - San Jose, CA

Physical Design Engineer II (IC)
Onsite
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ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs

Annapurna Labs (U.S.)

Cupertino, CA 95014

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Physical Design Engineer - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine Learning

Annapurna Labs (U.S.)

Cupertino, CA 95014

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Sr. Principal Tooling Design Engineer

Northrop Grumman

Sunnyvale, CA 94087

~ 19 min OnsiteEducation AssistanceHealth InsurancePaid Time Off

  • Bachelor's in a STEM discipline (Science, Technology, Engineering, or Math) with a minimum of 8 years of technical experience in design for manufacturing (DMF); master's degree in a STEM discipline with 6 years of experience.
  • Experience in 3D CAD modeling using standard commercial CAD software.
  • Experience in 2D drafting and drawing creation from 3D models.
  • Experience modifying existing 2D drawings and 3D CAD models.
  • U.S. citizenship required.
  • TRAVEL: Yes, 10% of the Time
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Manufacturing Engineer Level 3

Northrop Grumman

Sunnyvale, CA 94087

~ 19 min OnsiteHealth InsurancePaid Time Off

  • Bachelor's degree in a STEM discipline with a minimum of 5 years of relevant work experience; OR a Master's Degree in a STEM discipline with 3 or more years of relevant work experience
  • Experience reading and interpreting engineering drawings
  • Experience with mechanical assembly processes
  • Experience in continuous improvement
  • Experience in technical writing
  • Ability to obtain and maintain a DoD Secret Clearance
  • US Citizenship required
  • TRAVEL: Yes, 10% of the Time
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Sr. Applied Scientist, Sensors, Sensor Algorithms

Amazon.com Services LLC

Sunnyvale, CA 94087

~ 19 min OnsiteUrgently HiringHealth InsurancePaid Time OffRetirement Benefit

  • 3+ years of building machine learning models for business application experience
  • PhD, or Master's degree and 6+ years of applied research experience
  • Experience programming in Java, C++, Python or related language
  • Experience with neural deep learning methods and machine learning
  • Experience developing and implementing deep learning algorithms, particularly with respect to computer vision algorithms
  • Experience creating novel algorithms and advancing the state of the art
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Micro-architect/Logic Designer, Coherent Interconnect

Samsung Electronics Co.

San Jose, CA 95123

OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

  • 6+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 4+ years of experience with a Master's degree, or 2+ years of experience with a PhD
  • Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
  • Demonstrated successful architectural through RTL design experience on high performance digital designs
  • Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
  • Knowledge of system caches and directory snoop filter protocols.
  • Familiarity with different on-chip network topologies: mesh, ring, crossbar.
  • Experience in leading and mentoring a team of engineers.
  • Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
  • Knowledge of memory subsystem design including coherent cache design.
  • Strong communication and interpersonal skills are required along with the ability to work in a dynamic, global team.
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Sr. System RTL Designer/Serdes Architect

Advanced Micro Devices

San Jose, CA 95124

Hybrid

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field
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Sr Principal TIA Designer

Nokia

Sunnyvale, CA 94089

~ 19 min Onsite

  • Lead the architecture, design, simulation, verification, and silicon bring-up of ultra-high-speed Transimpedance Amplifiers (TIAs) for coherent optical and PAM4 data center applications
  • Translate system and chip-level requirements into robust analog circuit architectures and detailed transistor-level designs
  • Design and optimize low-noise, high-linearity broadband analog circuits for optical receiver front ends
  • Develop and validate supporting analog functions, including AGC loops, CTLEs, voltage regulators, bandgaps, and data converter interfaces
  • Drive package and system-level integration, ensuring optimal signal integrity and performance
  • Perform silicon characterization, debug, and correlation of measurement results against simulation models
  • Collaborate closely with layout, system, DSP, packaging, and product engineering teams throughout the development cycle
  • Lead technical reviews, contribute to design methodology improvements, and ensure successful first-pass silicon execution
  • Mentor and guide junior analog designers, fostering technical excellence within the team
  • Create and maintain high-quality technical documentation, design reports, and specifications
  • Extensive experience designing high-speed TIAs for coherent optical communication systems and/or PAM4 data center transceivers
  • Strong expertise in analog and mixed-signal IC design using SiGe BiCMOS and CMOS technologies
  • Deep understanding of transistor-level circuit design, device physics, noise analysis, and feedback/control loop stability
  • Proven experience in one or more of the following areas: Optical receiver front-end design, AGC loop implementation, CTLE design, High-precision analog circuits (bandgaps, regulators, ADC/DAC interfaces), Package and system-level integration
  • Proficiency with industry-standard EDA tools, custom analog layout techniques, and electromagnetic (EM) simulation tools
  • Demonstrated success delivering silicon from concept through production
  • Hands-on experience with lab measurement, debugging, and performance validation of high-speed ICs
  • Strong leadership, problem-solving, communication, and collaboration skills
  • Ability to work effectively in a fast-paced, multidisciplinary global engineering environment
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New Product Manufacturing Engineer

CACI International Inc

Los Gatos, CA 95032

~ 18 min Onsite

  • BA/BS degree in a technical discipline from an accredited college or university.
  • Minimum of five (5) years of experience as a manufacturing engineer or in a related role.
  • Must be a US person.
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