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Design Engineer

San Jose,CA

664 Design Engineer jobs in San Jose,CA

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Physical Design Engineer - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine Learning

Annapurna Labs (U.S.)

Cupertino, CA 95014

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Physical Design Engineer II (IC)

Arrow Electronics

San Jose, CA 95110

Onsite

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent practical experience.
  • 7+ years of hands-on experience in physical design and implementation, encompassing synthesis, PnR, timing convergence and physical verification.
  • Proficiency in utilizing Electronic Design Automation (EDA) tools such as Innovus, Tempus, and Quantus, as well as a deep understanding of physical design flows and methodologies.
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Mechanical Design Engineer Level 5

Northrop Grumman

Sunnyvale, CA 94087

~ 19 min OnsiteHealth InsurancePaid Time Off

  • Bachelor of Science degree in a STEM (Science, Technology, Engineering, Mathematics) discipline with 12 or more years engineering experience; Master of Science degree in a STEM discipline with 10 or more years of experience; or PhD with 8 years of experience
  • Solid background in machine design and drawing generation
  • Ability to plan tasks and execute to the established schedule
  • Ability to work in a fast-paced environment, supporting multiple projects simultaneously
  • Proficiency in using common engineering design, production, analysis, and office tools
  • Must be a US citizen
  • Must be able to obtain and maintain a US Government Secret Clearance
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Software Engineer - Core Systems and Storage Roles (Multiple Individual Contributor Levels)

NetApp

San Jose, CA 95123

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Senior Mechanical Engineer (Manufacturing Engineering)

Velo3D

Fremont, CA 94536

$145,000-$170,000/yr
Health InsuranceRetirement Benefit

  • Bachelor's degree from an accredited university in mechanical engineering or a related field or higher
  • 8+ years of experience in Mechanical Systems Design and Development
  • 5+ years of CAD experience (Solidworks prefered) Solidworks PDM, Solidworks Electrical
  • 8+ years' experience designing manufacturing systems for semiconductor, machining, automation, materials processing, or other related industrial capital equipment applications (Additive Manufacturing, Semiconductor, Solar, Robotics, CNC, or Biomedical Manufacturing Equipment Design Engineering experience)
  • Experience in GD&T; and quality detail drawing documentation.
  • Thermal Analysis, FEA, CFD, and simulation software.
  • Systems level thinker with experience working on complex mechanical systems
  • Willing and able to work "Hands-on" to build, integrate and test newly developed systems and/or subsystems
  • Self-driven and independent thinking. Ability to work independently.
  • Strong desire to work for a company on disruptive technologies and make it a success.
  • Strong written and oral communication skills.
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Senior Software Engineer - Data Protection Software Engineering (C, C++)

Dell

Santa Clara, CA 95050

~ 14 min Onsite

  • Senior Software Engineer
  • Data Protection Software Engineering
  • C
  • C++
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High Speed Analog I/O designer

Broadcom

San Jose, CA 95123

OnsiteHealth InsurancePaid Time OffRetirement Benefit

  • Master's or Ph.D. in Electrical Engineering, Electronics Engineering, or a related field
  • At least 10 years of experience in analog design, with a focus on high-speed RX and Analog-Front-End design
  • Experience with FinFET technologies
  • Expertise in high-speed DDR I/O interface, chip-chip interface design and optimization
  • Strong knowledge of analog receiver circuits such as CTLE, DFE, FEE
  • Knowledge of transmitter circuits such as FIR filter, slew rate control, voltage and current mode drivers
  • Knowledge of design for reliability ( EM, IR, aging, self-heating ) and layout effects (matching, reliability, proximity effects etc.)
  • Familiarity with custom digital design (i.e. high-speed logic paths, Serializer, De-serializer)
  • Proficiency with analog design tools (e.g., Cadence Virtuoso, Maestro, Spectre, HSPICE) and simulation techniques
  • Understanding of signal integrity, timing analysis and power management
  • Problem-Solving: Strong analytical and problem-solving skills, with the ability to resolve complex design challenges
  • Communication: Excellent verbal and written communication skills, with the ability to clearly convey technical information to stakeholders
  • Teamwork: Ability to work effectively within a cross-functional team and manage multiple priorities
  • Familiarity with industry standards and protocols related to DDR I/O, chiplet I/O and RX design
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STAFF MANUFACTURING ENGINEER

TE Connectivity

Milpitas, CA 95035

~ 17 min Onsite

  • BS/MS in Mechanical, Electrical, Chemical, Manufacturing, or Materials Engineering (or closely related engineering field)
  • Hands-on experience with semiconductor/MEMS wafer processing in a cleanroom environment
  • Demonstrated data driven decision making
  • Proficiency with engineering tools such as metrology equipment, wafer probing systems, SPC/DOE software (Minitab/JMP)
  • Experience with process control, formal process release, and engineering documentation (PFMEA, control plans, specifications)
  • Strong analytical and statistical skills with demonstrated use of ANOVA, SPC, DOE, or advanced data analysis methods in production environment
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Micro-architect/Logic Designer, Coherent Interconnect

Samsung Electronics Co.

San Jose, CA 95123

OnsiteEducation AssistanceHealth InsurancePaid Time OffRetirement Benefit

  • 6+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 4+ years of experience with a Master's degree, or 2+ years of experience with a PhD
  • Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
  • Demonstrated successful architectural through RTL design experience on high performance digital designs
  • Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
  • Knowledge of system caches and directory snoop filter protocols.
  • Familiarity with different on-chip network topologies: mesh, ring, crossbar.
  • Experience in leading and mentoring a team of engineers.
  • Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
  • Knowledge of memory subsystem design including coherent cache design.
  • Strong communication and interpersonal skills are required along with the ability to work in a dynamic, global team.
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New Product Manufacturing Engineer

CACI International Inc

Los Gatos, CA 95032

~ 18 min Onsite

  • BA/BS degree in a technical discipline from an accredited college or university.
  • Minimum of five (5) years of experience as a manufacturing engineer or in a related role.
  • Must be a US person.
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