700 Assistant Controller jobs in Gilroy,CA

Completed an accredited FNP or PA program with a national certification
In the past 5 years, practiced as an Advanced Practitioner for at least: 2 years in an outpatient primary care setting seeing patients of all ages (0+), OR 1 year in an outpatient primary care setting seeing patients of all ages (0+), coupled with either a 1 year primary care fellowship or 1+ year in an urgent care setting seeing patients of all ages (0+)
State licensed in California, obtained by your One Medical start date

MissionCare

Capitola, CA 95010

Whole Foods

San Jose, CA 95118

Merryhill School

San Jose, CA 95133

Bachelor's degree in Child Development or a related field
Minimum of one year in a school leadership or administrative role
At least three years of prior teaching experience
Knowledge of state education and licensing standards; maintains required credentials
Broad understanding of instructional programs, extracurricular activities, and strategies that ensure a safe and orderly school environment
In general, this position requires an individual to frequently walk, stand, sit, squat, stoop, reach, kneel, rise from the floor, twist, listen, read, write, and speak the English language. In addition, this position often requires an individual to carry, lift, use repetitive or fine hand movements, and occasionally push, pull, or bend. This position is regularly required to hear and use clear vision with or without correction.

Samsung Electronics Co.

San Jose, CA 95123

10+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master's degree, or 6+ years of experience with a PhD
Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
Demonstrated successful architectural through RTL design experience on high performance digital designs
Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Knowledge of system caches and directory snoop filter protocols.
Familiarity with different on-chip network topologies: mesh, ring, crossbar.
Experience in leading and mentoring a team of engineers.
Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
Knowledge of memory subsystem design including coherent cache design.