1167 Affinity Gaming jobs in California

Ability to travel to or commute between data center locations as needed
Willingness to temporarily work at alternative sites during training periods or until assigned facility is operational
Travel frequency will vary based on business needs and operational status of assigned facility
Candidates must be able to travel (over 50 miles) or commute (less than 50 miles) to active data center sites as required by business needs.
2+ years of Microsoft Office products and applications experience
2+ years of electrical and mechanical experience
Regularly lift and/or move up to 39 pounds independently
Participate in group lifts for 40+ pounds
Maintain balance and perform construction tasks while on a ladder
Regularly walk, use hands and fingers, handle or feel, reach with hands and arms, stoop, kneel, crouch or crawl, climb stairs, twist, bend, work above shoulders, grasp, carry, push and pull objects into position
Work in an environment requiring provided ear protection
The position may be assigned to a facility still under development, which could require travel to established locations for training until your designated site becomes fully operational.

medical solutions

Modesto, CA 95351

Samsung Electronics Co.

San Jose, CA 95123

10+ years of experience with a Bachelor's degree in Computer Science/Computer Engineering/relevant technical field, or 8+ years of experience with a Master's degree, or 6+ years of experience with a PhD
Strong background owning and driving the RTL design of various sub-blocks of the coherent interconnect or memory controller or LLC for the high performance digital designs
Demonstrated successful architectural through RTL design experience on high performance digital designs
Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Knowledge of system caches and directory snoop filter protocols.
Familiarity with different on-chip network topologies: mesh, ring, crossbar.
Experience in leading and mentoring a team of engineers.
Knowledge of in Arm AMBA5 CHI, AMBA4 ACE or AXI coherent interconnect and bus protocols
Knowledge of memory subsystem design including coherent cache design.